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Dummy transistor and decoupling capacitor (Read 16553 times)
Geoffrey_Coram
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Re: Dummy transistor and decoupling capacitor
Reply #15 - Mar 30th, 2007, 9:00am
 
chase.ng wrote on Mar 26th, 2007, 6:28pm:
Are those fets ESD protected in any other way? Or they just wired the gates to power supply?


Is the parasitic resistance in the wiring sufficient to protect the gates from ESD?  I'd think you'd want a kOhm or so of explicit resistance ...
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Geoffrey_Coram
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Re: Dummy transistor and decoupling capacitor
Reply #16 - Mar 30th, 2007, 9:02am
 
[quote author=Croaker link=1173775896/0#8 date=1174662643]krishnap wrote on Mar 23rd, 2007, 2:47am:
I was actually asking...I think it can be minimum length in all cases, but if anyone knows differently, please let me know!


I thought the idea with these dummy gates was to make a regular array of poly stripes, and therefore they should all have the same length.
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Croaker
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Re: Dummy transistor and decoupling capacitor
Reply #17 - Mar 30th, 2007, 9:04am
 
[quote author=Geoffrey_Coram link=1173775896/15#16 date=1175270525]Croaker wrote on Mar 23rd, 2007, 8:10am:
krishnap wrote on Mar 23rd, 2007, 2:47am:
I was actually asking...I think it can be minimum length in all cases, but if anyone knows differently, please let me know!


I thought the idea with these dummy gates was to make a regular array of poly stripes, and therefore they should all have the same length.


Well yes, outer poly gets more etched than the inner poly fingers, so you put a dummy on the outer edge to get the extra etching.  

However, I think the dummy can be minimum length since it is only there to get a bit etched.
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ywguo
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Re: Dummy transistor and decoupling capacitor
Reply #18 - Apr 2nd, 2007, 11:31pm
 
It is really interesting. Does anybody has measurement result or sth. else?
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