Hi, Guys,

Let's start a thread that discuss all possible errors in the current cell matrix of a current steering DAC.

Somebody said that there are graded error and symmetrical error. The graded error is caused by a voltage drop along power supply lines. The symmetrical error is caused by the thermal distribution.

I doubt that the thermal distribution can cause a symmetrical error. Is the center of the current cell matrix of the highest temperature? I think that the thermal distribution is strongly related to the structure of the matrix. Especially the current cell are never turned off for a differential output DAC. Another scenario is that a thermal source on chip is very near the DAC. Am I right?

Do you think of any other possible error distribution? Do you know any other reason that causes the symmetrical error and the graded error?


Thanks
Yawei

Hi, Krishnap,

Sorry that my questioin is not clear. Sure I know that the device mismatching contributes to the error distributioins. However, I doubt that the symmetrical error is caused by the thermal distribution.

Is there any real measurement that proves the thermal distribution causes the symmetrical error? For a standalone DAC or a DAC in a SOC.


Thanks
Yawei