Dear all,

this question seems a bit trivial, but it is something I noticed and cannot find a solution for...

When you read textbooks and CP (charge pumps) and LF (loop filters) in a PLL, the classical transfer functional looks something like:

Code:

H(s) = Icp/(sC1)*ΔΦ  

Now, this implies an 'integrating function' due to the 1/s term. So, for a classic LF implementation (using a resistor in series with a capacitor + in parallel another capacitor), you would except the voltage on the LF to become larger (integrate) when you would apply a DC current (let's say this models the CP current).

However, when you set up such a simulation this is not what you see (at least not right away).
Assuming R1 = 500kOhm, C1 = 1nF, C2 = 0.1nF and Icp = 100uA for now, what I see in simulation is that all the current (initially) is drawn by the smaller capacitor, causing the output voltage to rise 10 times faster than expected (I just apply a simple DC current to the LF).

After a certain time constant (~ R1*C1) the system 'settles' and C1 draws 90uA and C2 draws 10uA (as you could expect). From then on, the voltage rises as expected from the above formula.

Now, I'm not surprised by this time constant, but I'm wondering how I can start the simulation right away in this
nominal/settled condition? I'm also aware this is more of an issue in an 'open loop' simulation than within a closed loop full PLL simulation. The goal is just to simulate the PFD/CP/LF in open loop and inspect the output voltage.

I tried out initial conditions, but I don't think that setting a certain initial voltage on the caps can help me here...
any suggestions?

Kind Regards

Peter