Hi,

I am working with a two stage cascode opamp. Schematic Attached.

I am unable to get mosfets M8 and M9 to get into saturation for any sizing that I try.

From SPICE it is seen that Vds(M7) is very high, almost 9 V (rail to rail is 10V)

Vds for M8 and M9 go very low and they are driven into linear region.

Could anyone explain why does so much voltage drop over M7?

Thanks a lot.

-Almitra.

********************************
SPICE Description:

.param w1=200u w2=200u w3=200u w4=200u c1=50pf w5=50u w6=100u
m1 2 4 5 vss nmos w=w1 l=4u
m2 1 3 5 vss nmos w=w1 l=4u
m3 2 2 vdd vdd pmos w=w2 l=4u
m4 1 1 vdd vdd pmos w=w2 l=4u
m5 5 10 vss vss nmos w=w3 l=4u
m6 7 2 vdd vdd pmos  w=w4 l=4u
m7 8 11 7 vdd pmos w=w4 l=4u
m8 8 12 9 vss nmos w=w4 l=4u
m9 9 6 vss vss nmos w=w4 l=4u
m10 6 1 vdd vdd pmos w=10u l=4u
m11 6 6 vss vss nmos w=10u l=4u
m12 10 10 vss vss nmos w=10u l=4u
m13 11 11 vdd vdd pmos w=w5 l=4u
m14 11 10 vss vss nmos  w=w6 l=4u
m15 12 11 vdd vdd pmos w=w5 l=4u
m16 12 12 vss vss nmos w=w5 l=4u
cl 8 0 c1
ib vdd 10 10u
vdd vdd 0 5
vss vss 0 -5
vinp 4 0 1.5 ac 0.5 0
vinn 3 0 1.5 ac 0.5 180
**********************************************

Hi Sheldon,

That was really very useful. The output voltage was indeed clamped to -5V.


Generally we equate currents through the output branch transistors, is the same done for cascode transistors as well?

Could you please let me know what is the correct way to adjust bias voltages B2 and B3 ?

Thanks a lot.

-Almitra