Hi everybody,
I've just submited to this forum hoping to find some help for my project. I'm designing a Dual Gate Mixer (RF=60GHz and IF=10GHz) under techno CMOS65nm.I'm using the following architecure (on the picture)
The problem I'm having is withing the matching of this architecture. Right now, I've just run the simulation under Eldo in order to extract the S Parameters. I'm having the following results:
STEADY_STATE_S11 = -6.0149E-01  
STEADY_STATE_S21 = -3.0978E+01  
STEADY_STATE_S31 = -3.2029E+01  
STEADY_STATE_S12 = -2.9899E+01  
STEADY_STATE_S22 = -3.4055E+00  
STEADY_STATE_S22 = -1.3496E+01  
STEADY_STATE_S13 = -2.6439E+01  
STEADY_STATE_S23 = -2.2081E+01  
STEADY_STATE_S33 = -1.4253E+00  
STEADY_STATE_ZIN_RF_R =  1.7541E+00  
STEADY_STATE_ZIN_RF_I = -5.8276E+00  
STEADY_STATE_ZIN_OL_R =  3.2893E+01  
STEADY_STATE_ZIN_OL_I = -7.2341E+01  
STEADY_STATE_ZOUT_FI_R =  3.5117E+02  
STEADY_STATE_ZOUT_FI_I = -3.0018E+02  
As you can see, the results are mediocre. I wonder how can I performe a matching to improve the performances of this circuit. I will be very grateful if you tell me the matching circuit to include in each of the 3 ports.
I should reduce S11,S21,S22,S12,S33,S13,S23 to ensure good isolation and improve S31 and S32.Am I right?if it's the case How can I proced?and where should I insert the matching circuit.
thanks in advance