Hi all,

I read a paper called "Low-Power 2.4-GHz Transceiver With Passive RX Front-End and 400 mV Supply" by Ben W. Cook, Axel Berny (JSSC Vol.41 no 12, Dec 2006, pp. 2757-)....and a few others. Anyway I've read it and re-read it over and over and i still cannot figure out how they got such amazing performance. If anyone has the time maybe you can check it out, but i did some quick calculations and found that their baseband amp which doubles as the channel filter must have an IRN of around 10 nV/ rt Hz with IIP3 of over 600 mVrms, 80 dB gain (4 stages cascaded) and using less than 1 mA of current. They used CMOS 0.13 technology...

It seems there must be some assumption that they made to get this kind of performance which I am not aware of. Can anybody figure it out? Anyway its a good read for anyone interested and there are a lot of neat tricks they employ to lower the power and chip area...

thanks,
Aaron