Hi,
as soon as an organization get larger than a handful of designers/layouters and reusers there is a huge need for communication about the current state of a particular analog or digital module. A module may be a large as a chip or PCB unit or as small as a schematic block that needs to be layouted.

Nothing is better than face to face meetings with status reports, but when the development is spanning more sites and some entities used are delivered by external vendors where there is an internal responsible person, extencive communication with that person is nescessary unless he is pushing his info via email. Email is full anyway and never really read.

If you then develop a product depending on internal and external development of multiple chips (chipset) and other devices a design group may need a software to keep track of things that are finished, in progress, locked for bugfixing, in the process of releasing etc.

How are you guys solving this problem? I am thinking of writing a Web application for intranet use in order to keep the big picture. I think tis is called PLM (Product Lifetime Management) but those tools seem to integrate into the EDA tools. I just want to make a little information portal to replace the usual excel spreadsheet that is sooner or later getting out of date.

I have looked at using something like phpGroupware or a wiki, but either solution does not quite fit my needs.

Inputs are welcome. Links to documents even better.

Hi Swen,

I think you have a similar issue in mind which I described in an older post. I have been tired talking about productivity improvement in the analog/mixed design flows. Industry is focused on improved single tool functionality or capacity but not integrating the tools and providing methodology and continuous education.

I have been a long time designer in the past and give you the warning that an info which requires activity by the designer will fail. Instead a work flow tool must check various interoperability contracts and assumption by them self. If there are issues these must be pointed and retarded if resolved.

The key to the work flow are the design contracts. The contracts could be simple starting from pin lists, to signal definition, detailed specification, test environments, global resources as area, power, design time. Everything what are the typical discussion topics in the regular design meetings. If these kind of design contracts could be checked automatic there is a clear guidance for both, the designers and the project management.

Take an example. If an analog module is specified at a sufficient detailed level an automated testbench could verify the design contract. In this case a list of values with bounds. If the design is handed over to layout the verification environment check the layout impact. If tech migration or reuse is on the worklist the contract could be checked in the same manner.

What comes closer to a possible more multichip, digital centered design flow a database of pins lists, signal list, test bench records. These could be automated.