rf-design
Senior Member
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Reiner Franke
Posts: 165
Germany
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Hi Swen,
I think you have a similar issue in mind which I described in an older post. I have been tired talking about productivity improvement in the analog/mixed design flows. Industry is focused on improved single tool functionality or capacity but not integrating the tools and providing methodology and continuous education.
I have been a long time designer in the past and give you the warning that an info which requires activity by the designer will fail. Instead a work flow tool must check various interoperability contracts and assumption by them self. If there are issues these must be pointed and retarded if resolved.
The key to the work flow are the design contracts. The contracts could be simple starting from pin lists, to signal definition, detailed specification, test environments, global resources as area, power, design time. Everything what are the typical discussion topics in the regular design meetings. If these kind of design contracts could be checked automatic there is a clear guidance for both, the designers and the project management.
Take an example. If an analog module is specified at a sufficient detailed level an automated testbench could verify the design contract. In this case a list of values with bounds. If the design is handed over to layout the verification environment check the layout impact. If tech migration or reuse is on the worklist the contract could be checked in the same manner.
What comes closer to a possible more multichip, digital centered design flow a database of pins lists, signal list, test bench records. These could be automated.
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