Hi kamath,
Did you try a bus signal for your inputs?
Hope this helps...
BOE

Hi

I would like to implement a mux very similar to the code boe suggested for a simulation test bench where i want to set one input for the entire simulation.  So instead of using a control signal i would like to use an integer parameter to select the input of the mux. Here is my code

`include "constants.vams"
`include "disciplines.vams"

module 64bit_mux(inp, outp);
input [63:0] inp;
output outp;

electrical [63:0] inp;
electrical outp;

parameter integer N=0 from [0:63];

analog begin
 V(outp) <+ V(inp[N]);
end
endmodule

However, it will not compile and i get the error message

Error found by spectre during SpectreHDL compile.
   "/64bit_mux/veriloga/veriloga.va",
       line 16: "V(outp) <+ V(inp[N])<<--? ;"
   "/64bit_mux/veriloga/veriloga.va",
       line 16: Error: The index used to access bits of analog signal vector
       `inp' is not a constant, constant expression, genvar variable or a
       genvar-constant expression. To avoid this problem, ensure that the
       indexes used to access the bits of analog signal vectors are constants,
       constant expressions, genvar variables or genvar-constant expressions.

I tried using a genvar variable but no luck. Sugestions?

Bill

BTW, I tried the same code as BOE but get the same error message as above

Thanks AW, that did the trick

Bill