hai,
i have tried this code in verilog-ams...

i get glitches sometimes in the output waveform,plz sugest some solution.Also the vtrans in the model has no use,also tell me more abt the vh,vl ie vhigh and vlow....

`include "constants.vams"
`include "disciplines.vams"

module mux(p1,p2,p3,p4,s1,s2,out);
parameter real vh=0.75;
parameter real vl=0.75;
parameter real vtrans=0;
output out;
input p1,p2,p3,p4,s1,s2;
electrical p1,p2,p3,p4,s1,s2,out;
analog begin
if ((V(s2)-vtrans) <= vl && (V(s1)-vtrans) >= vl)
V(out)<+V(p1);
if ((V(s2)-vtrans)<=vl && (V(s1)-vtrans)>=vh)
V(out)<+V(p2);
if ((V(s2)-vtrans)>=vh && (V(s1)-vtrans)<=vl)
V(out)<+V(p2);
if ((V(s2)-vtrans)>=vh && (V(s1)-vtrans)>=vh)
V(out)<+V(p3);
end
endmodule