Hi Vivek,
There are a few restrictions on using the ddt operator, try using an intermediate signal....
BOE

Hi Vivek,
I usually use something like
Code:

electrical sig, ddt_sig;
V(ddt_sig) <+ ddt(V(sig)); 

Then I work with the signals V(sig) and V(ddt_sig)...
And the ananlog operators (ddt etc) are not allowed in (dynamic) conditional statements, loops etc. (at least in my simulator)...
Hope this helps. If not, please give a piece of code...
BOE

The techniques you are using are inappropriate and will likely result in incorrect results and convergence problems.

The first problem is in the way you formulate your capacitor. When you calculate C as a nonlinear function of voltage, and then try to convert C to current, you end up with the wrong capacitance and charge conservation problems. You should instead compute the charge analytically, and then differentiate it with ddt() to compute current. This eliminates the accuracy problem. It also eliminates the problem you have having with the simulator, that leads you to your second problem.

The second problem is that you are using an internal node, which also results in two problems. First, an internal node is kind of expensive. Second, it has the wrong tolerances. You declare the internal node to be electrical, but it is not. As a result, you are using the wrong tolerances for that signal, which can result in convergence problems if they are too tight or accuracy problems if they are too loose.

I recommend that you follow the guidance provided in "Modeling Varactors", http://www.designers-guide.org/Modeling/varactors.pdf.

-Ken

If the controlling terminals are distinct from the capacitors terminals you still need to be careful or you will get nonphysical results.

Imagine you had
i = C(x)*dv/dt
and C(x) was such that for some value of x, say x₁, C(x₁)=1 and for another value of x, say x₀, C(x₀)=0. Now set x = x₁ and connect the capacitor to a 1v DC source such that v=1 and dv/dt=0. The capacitor is now holding 1 Coulomb of charge. Now change x to x₀. Now the charge on the capacitor must be 0 because C is 0, but because dv/dt=0 no current actually left the capacitor. Charge is not conserved.

-Ken

Yes, you are correct, so your approach is fine as long as the capacitor is linear. However, I am surprised by your comment that you don't have access to the charge. For a linear capacitor charge is simply equal to the capacitance times the voltage.

-Ken

safwatonline wrote on Feb 18^th, 2008, 9:05am:


The integral q=∫₀^vCdV is a path integral, have you any method for evaluating it ? I'd like to build a macro-model of a non-linear capacitance where q=C(v)*v and I was wondering if applying a sine voltage and integrating the current over a cycle would do the trick (of extracting the q=C(v)*v curve).

BTW, anyone knows how dielectric loss and dielectric relaxation could be modelled ?

Thanks a lot Ken for your valuable advice. I was also facing the same dilemma, however in MAST (Saber). The link you attached for your explaination of modeling non-linear capacitances is excellent.