Jess Chen
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I think you are asking about how charge pump current and divider ratio affect the loop gain. Both are simple gain elements in the overall loop gain. If you want to maintain a particular phase margin when you change the divider ratio by say a factor of 2, you have to change the charge pump current in the opposite direction by a factor of 2. The phase margin will remain unchanged but the phase noise may not, depending on where the dominant noise contributors lie.
If you want to simulate the phase margin for different parameters, you can write behavioral models in VerilogA or VHDLAMS and use Spectre, SPICE, ELDO, etc. If you prefer an analytic approach you use Matlab, Excel, Mathematica, etc. Either way you will need to use a phase domain model. Any half way decent book on PLLs will show you how to create the phase domain model and compute the loop gain and phase margin. Ideally you would do both and make sure the results agree.
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