Hi,
I am simulating 10 bit DAC without and with including I/O pad (I/O schematic is added).
Simulationg conditions:Fout=10MHz Fclk=125MHz
Setup:An input of 10Mhz input and Fclck=125Mhz to ideal ADC and output of ADC output is  connected to MY DAC.
I am getting oscillations with I/O pads.I attached output also.
Can you please suggest me possible reasons.

Hi Venki,

Which numerical integration method do you use? HSPICE has 2 options. They are trap, gear. Spectre are more complex. Though method=gear is oftren more accurate than method=gear. It leads to wired oscillation sometimes.


Yawei

Trapezoidal ringing is point-to-point, meaning that the points will alternate between up and down. The ringing shown in the figure is not point-to-point ringing and so is not trapezoidal ringing. Rather, it is due to the circuit.

-Ken

Hi all thanks for replying...

hi yuwei
i am gear2only from cadence-spectre simulator.

Thanks for ur reply.

Hi sheldon
I am designing current steering DAC with 75ohm load.
I am using a  bondwire model which includes inductances of 2.6n ,cap of 40f and res of 120m ohm.
I am not using any buffers for driving I/o pads.

Thnaks for reply

hi all

To decrease oscillations ,I added 100pf decoupling capacitor across avdd pins  and gnd pin and oscilations got reduced but in the  same waveform i am having glitch probem. There was glitch at faling edges but not on rising edges of dac output. This glitch is observed only when [color=#666600]DAC top-level simulations are done with I/O and bond wire models [/color]and no glitch is observed when simulations are done without I/O and bondpad models.This glitch not getiing reduced by increasing the deoupling capacitor.

Please help me in this issuse..

Regards
Venkats

at first glance this looks like inductive ringing in the bond wires.

Take the L associated with the BW and reduce it. See if the oscillation shifts in magnitude and frequency.

Hi Venkats,

Given the age of this thread, I am hopeful that you have solved your problems, and can post here what the
solution is so we can all learn from it.

In the event not, I have a few points to add.

The noise looks like digital clock noise coupling into your output, perhaps through the digital wires driving the current-steering
differential pairs in your DAC as was suggested. In the small chance you haven't already done this, did you double buffer the
digital control inputs onto your local supplies?  Otherwise you inject the noise in your driving ADC into your own DAC. I would also
look for your local clock coupling onto the bias voltage which sets up the currents which are steered. I would also look for the ESD
diodes in your pad schematic to be injecting power supply noise, but this should be common-mode assuming the ESD diode areas
are identical. I mention this last bit because you said adding power supply bypass capacitance reduced the magnitude of the problem

As for the glitches (pink waveform) on falling edges, but not rising, is this a single-ended output, or differential?  The signal label IOP suggests it
might be single ended, with the other output IOM not shown, or non-exsistent.  For this case, I expect that the cause of the glitch
is the charge-injection associated with turning your current steering switches on and off.  For a falling edge, discharging the steering
transistor creates a charge flow opposite to the intended for a short amount of time.  For a rising edge, this charge flow would be
of the opposite direction, and might not be visible in your waveform. This typically occurs if you size your current-steering differential pair too
large to get the series resistance down, or the current you are steering is too small. I am not surprised that this shows up only when you add in
the series inductance of the bond wires.

I hope you find this helpful.

Will.