I am unable to view the internal nodes of a Spectre subcircuit in an AMS Designer simulation. I can only see the nodes that are in Verilog-AMS. Here's what I have.
top.vams
Code:`include "constants.vams"
`include "disciplines.vams"
module top ( );
electrical vdd;
electrical vss; ground vss;
sub sub1 (.vdd (vdd), .vss (vss));
analog V(vdd) <+ 2.5;
endmodule
subcircuit.scs
Code://
simulator lang=spectre
subckt sub (vdd vss)
r1 (vdd out) resistor r=1k
r2 (out vss) resistor r=1k
ends sub
top.scs
Code:tran tran stop=100u save=all
saveNodes options save=all
run.tcl
Code:database -open output -into out -default
probe -create top -depth all -database output -waveform
probe -create -emptyok -database output -flow -ports -depth all
run 1us
exit
Makefile
Code:all:
rm -rf INCA_libs out
ncvlog -ams top.vams
ncelab top -modelpath subcircuit.scs -messages -access +rwc
ncsim -ams top -analogcontrol top.scs -messages -input run.tcl
When I type:
make
simvision &
I only see top.vdd, top.vss (and the currents).
I want to be able to see sub1.out
Any suggsetions?