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Array declaration for analog output (Read 2530 times)
shaikhsarfraz
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Array declaration for analog output
Oct 17th, 2007, 10:28pm
 
Hi All,
Is it possible to declare an analog output array of a sensor block in verilog - ams?

Here is what I am doing

module XYZ (in,out);

output [Array_size-1:0] out;

Now how to declare this output out net i.e whether to use wreal or electrical or is there any other assignment.
The port out is supposed to carry analog signals.

Regards
Sarfraz
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jbdavid
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Re: Array declaration for analog output
Reply #1 - Nov 30th, 2007, 1:38pm
 
If "out" is wreal you'll have to declare an array of real, and do an assignment from the real array to the wreal array,
if "out" is electrical, you'll have to create a contribution statement for each wire in the bus.
jbd
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jbdavid
Mixed Signal Design Verification
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