as the attached draw,  schematic A is very convertional and can find in many papers and books.
i have discussed with some people  and make a conclusion that schematic B does't work. For the loop is a postive feedback loop,and the loop gain may be greater than 1.  While in schematic A, the loop gain is smaller than 1.
So i think that the schematic A will work , while B does't.

But in Thonmas H.Lee 's  "Design of CMOS RFIC (2ed edition)",  a practice in Chapter 10, which is also the last practice, He said
that both A and B will  either work or does't work at the same time.  He said this had been proved.

I can't understand. Help me.

Thanks.  

In fact, there is also a positive feedback loop in Fig.1.
To stablize the circuit, you have to make the negative loop factor larger than the positive one.

nowhere

Hi,

Jim is right. A simple way to look at the negative feedback action of the degen resistor is as follows:

If there is a small increase in the current flowing thru the degen resistor, that will generate a small decrease on the VGS of the corresponding NMOS transistor. Therefore that will force - by means of the positive feedback which comprises the PMOS current mirror, a decrease on the current flowing thru the resistor, which will counterbalance the first increase on such current.

Both loops have positive and negative feedback, and as Jim stated, you have to guarantee the negative feedback loop having more gain than the positive loop.

Hope this helps
tosei