xwj623
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as the attached draw, schematic A is very convertional and can find in many papers and books. i have discussed with some people and make a conclusion that schematic B does't work. For the loop is a postive feedback loop,and the loop gain may be greater than 1. While in schematic A, the loop gain is smaller than 1. So i think that the schematic A will work , while B does't.
But in Thonmas H.Lee 's "Design of CMOS RFIC (2ed edition)", a practice in Chapter 10, which is also the last practice, He said that both A and B will either work or does't work at the same time. He said this had been proved.
I can't understand. Help me.
Thanks.
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