sheldon
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SuperMentor,
Responding to the question on the difference between PVT variations, corner analysis, and mismatch analysis:
Normally, process variation of the PVT variations, corner analysis, effect all devices in the simulation equally. This analysis is meant to model the effect of running many wafers through the fab. These variations are sometimes called inter-die variations. The analysis shows whether the circuit will meet specification for across all expected process variations or not. By including the power supply voltage variations, V, and the temperature variations, T, designers can verify that their circuit will meet specification across all expected environmental conditions.
Mismatch analysis effects each device in the simulation differently and this analysis is meant to model the effect of device mismatch on circuit performance. These variations are sometimes called intra-die variations. The analysis shows the sensitivity of the circuit design to the physical design, layout. As a result of the analysis, the designer may need to specify layout constraints or modify the circuit architecture to reduce the sensitivity of the design to layout. The good news is that most parameters are relatively insensitive to mismatch: gain, bandwidth. Bad news, key parameters can be highly sensitive to mismatch: IP2. Also in general, deterministic mismatch analysis has limited applicability. For most RF circuits, designers need to perform Monte Carlo- based mismatch analysis.
So corner analysis, PVT variations, models "macroscopic" process variations or wafer-to-wafer process variations while mismatch analysis models "microscopic" process variations or device-to-device process variations.
Best Regards,
Sheldon
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