how to calculate or predict the Mismatch of current mirrors in practice design?
we know two formulas in mirrors: delta(I)/I=delta(W/L)/(W/L)+2*delta(Vth)/(Vgs-Vth)
delta(Vth)=0.1*tox / [ (WL)^0.5]
I don't know the Mismatch of delta(W/L)/(W/L) in practice MOS transistor, I didn't find the answer in kit's design rule.
What are the rules of thumb on this term?
As a roughly predict, I calculate the Mismatch like this:
delta(I)/I=2*delta(Vth)/(Vgs-Vth)
delta(Vth)=0.1*tox / [ (WL)^0.5]
tox=0.35um/50=70A ( for 0.35um technology )
Vgs-Vth=Vdsat=200mv
So i get the following roughly formula to predict the Mistach:
delta(I)/I=14mV/{[ (WL)^0.5]*Vdsat}
=14mV/{[ (WL)^0.5]*200mV}
Did my couclusion correct or reasonable?
Are there any rules of thumb about the Mismatch of current mirrors?
Thanks for help.