Dear Friends,
First of all my thanks to the wonderful site,so informative and helpful.

I have modeled a double gate MOSFET using verilog-a(on mentor graphics ADvance MS tool).Its running properly and showing me the expected characteristics of the device.Then I used the model developed to design an inverter(on ELDO),and it does not simulate.It shows convergence error.When I run the code,it starts DC ramping and then the system hangs.
Please help and suggest.
Thanks.

I agree with Rajdeep: hard to say without seeing the code.

Did you read my tutorials from BMAS 2004:
http://www.bmas-conf.org/2004/papers/bmas04-coram.pdf
http://www.bmas-conf.org/2004/presentations/bmas04-coram-preso.pdf

There are a number of poor modeling techniques that might work fine in a digital or mixed-signal tool, but that don't really make sense in an analog simulator.

rajdeep wrote on Jan 17^th, 2008, 7:12am:


dqbs_dvbs is what the simulator computes as the derivative of qbs; the next line is what the model-writer wanted.

In C, the model-writer knows that, when vbs==0, q=0 and there's no need to do all the calculations.  However, in Verilog-A, if you try to skip the calculations, you end up with the wrong derivative!

rajdeep wrote on Jan 31^st, 2008, 11:04pm:


That's right, the Verilog-A compiler computes all the derivatives that the simulator needs, based on the potential or flow (voltage or current) contributions (<+) in the model.

The original C code had something like
 if (vbs == 0.0) {
   qbs = 0.0;
   cbs = czero_bs;
 } else ...

You should *NEVER* have a == test involving a voltage-dependent quantity (vbs) in Verilog-A, because you'll end up lying about the derivatives.

The Verilog-A code should be
 if (vbs <= 0) begin
   qbs =
 end else begin
   qbs =
 end

that is, only 2 branches, and there's no cbs calculation, because Verilog-A computes the derivatives automatically.  You of course need to be sure that qbs(vbs=0-) = qbs(vbs=0+), but the original model developer did that for you in this case.