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cubalex New Member Offline Posts: 2 Germany	Advantage of using Div-2 Frequency Dividers Mar 07^th, 2008, 1:41am Hello everybody, I'm wondering if it is desirable to design a frequency divider for a frequency synthesizer PLL only with 2^n dividers. Are there any advantages (speed, power dissipation, easy implementation in CMOS, noise,...) in avoiding digital counters or other non divide-by-two blocks? Thanks in advance! Alex
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ywguo Community Fellow Offline Posts: 943 Shanghai, PRC	Re: Advantage of using Div-2 Frequency Dividers Reply #1 - Mar 9^th, 2008, 11:25pm Hi, Sure it is easy to implement a 2^n divider. And a simple implementation often means lower power. However, what divider you need depends on the application and spec. Best regards, Yawei
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vivkr Community Fellow Offline Posts: 780	Re: Advantage of using Div-2 Frequency Dividers Reply #2 - Mar 10^th, 2008, 4:02am Be aware that using 2^n counters (asynchronous %2 counters) will result in more phase noise as opposed to using synchronous counters. The price you pay for synchronous counters is of course more, much more power. Vivek
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Berti Community Fellow Offline Posts: 356	Re: Advantage of using Div-2 Frequency Dividers Reply #3 - Mar 10^th, 2008, 4:34am Hi Vivek, when using an asynchronous counter, you can synchronize the divided output with the input clock using a single flip-flop. In this way, only this single flipflop will contribute to jitter/phase noise. Regards
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vivkr

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Re: Advantage of using Div-2 Frequency Dividers
Reply #4 - Mar 11^th, 2008, 11:53pm

Berti wrote on Mar 10^th, 2008, 4:34am:

Hi Vivek,

when using an asynchronous counter, you can synchronize the divided output with the
input clock using a single flip-flop. In this way, only this single flipflop will contribute to jitter/phase noise.

Regards

Of course !!! Thanks for correcting this omission in my post.

Regards
Vivek

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cubalex

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Re: Advantage of using Div-2 Frequency Dividers
Reply #5 - Mar 13^th, 2008, 2:03am

Hi,

thank you for your replies.

In my case I have the option to use a standard TCXO with a divider value of
217 or a not-so-standard TCXO with a divide-by-32 (five divide-by-2 dividers).

If I got it right, it is worth using the not-so-standard TCXO for the advantages
of a divide-by-2 elements.

To put it in a nutshell, a divide-by-2 offers
- higher speed
- low power dissipation (async divide-by-2)
- smaller size
- easier implementation
in contrast to counters.
The disadvantage of jitter noise accumulation through async dividers can be
eliminated by synchronizing the last flipflop with the clock.

Regards
Alex

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Berti Community Fellow Offline Posts: 356	Re: Advantage of using Div-2 Frequency Dividers Reply #6 - Mar 13^th, 2008, 11:40am A divide-by-2 also ensures a duty-cycle of 50%. Often this is the main reason for (at least one, final) divide-by-2. Regards
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