The Verilog-code that I mentioned for modeling the charge pump is as follows:

module cp (pout, nout, inc, dec);
   parameter real cur = 1m;      // output current (A)
   input inc, dec;
   electrical pout, nout;
   real out;

   analog begin
     @(initial_step) out = 0.0;

     if (dec && !inc)
         out = -cur;
     else if (!dec && inc)
         out = cur;
     else out = 0;

     I(pout, nout) <+ -transition(out, 0.0, 10n, 10n);
   end
endmodule


I am wondering why we need to add "-" before "transition". Thanks in advance.

Current is positive if it enters pout and exits nout (associated reference direction). Since this is a source, we think of positive current leaving the source. Thus we need a negative sign to convert our conventions internal to the model, that of a source, to the conventions used by the language, associated reference direction.

-Ken