You are trying to keep a low IR drop when an ESD event occurs, because that voltage will appear somewhere in your circuit as part of the ESD budget.

That said, ESD events can have very high currents, over 1 amp.

Also, you are trying to keep a low R due to current surges and voltage stability on both power and ground.

You need to model the above two, and quantify the current loads, for both power and ESD, then you can quantify the resistance number that you need to stay underneath.  Generally, well under 1 ohm is where you would like to be, but a specific number is going to be based upon the above considerations.

Hope that helps,
Jerry

The ESD models are standarized. The most common ones are human body model (HBM), machine model (MM) and charged device model (CDM). HBM is represented by about hunderd picofarads and 1.5K resistor in series, while MM has much less series resistance (do not recall exact numbres now).
Hope this helps

Tosei

agreed - the JEDEC standards define the HBM, MM et. al. models, which you do with ideal components and and ideal switch. THis will give you a quatitatized approach to the currents caused by an  ESD event.

caution with the error tolerances in the simulator, 2KV at one place in the simulator and <1V elsewhere can mess things up

jerry