There's a SourceForge project "ADMS" that converts Verilog-A to XML and then to C.  The XML to C part requires you to have a special script that defines the API for the simulator you're expecting to link to.  There's a free simulator "zspice" that is supposed to work with ADMS, I forget if you have to install it also or if ADMS comes with that script; if ADMS has the script, then you could generate the C output if that's all you wanted, and not link it into zspice.

http://sourceforge.net/projects/mot-adms/

Of course, Rajdeep didn't say anything about why he wants the compiler.  If you want events to be handled, then you must have some plan to incorporate the output in a simulator, and you'd better get the Verilog-A compiler that generates object files for your simulator.  And, of course, ADMS is open-source, so you're free to add support for whatever you want.

My guess was that he was interested in taking, say, the Verilog-A code for a compact model and converting it to C, with begin/end changed to braces, etc.