Designer’s Guide Community :: Forum

Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.

May 5^th, 2024, 6:00pm

	HomeHelpSearchLoginRegisterPM to admin

The Designer's Guide Community Forum › Design Languages › Verilog-AMS › Absdelay function implementation

‹ Previous topic | Next topic ›

Pages: 1

Send Topic

Print

Absdelay function implementation (Read 3998 times)

lobarth New Member Offline Posts: 3	Absdelay function implementation Apr 02^nd, 2008, 9:13am Hi I discover verilog-a last Thursday. I would like to execute once the absdelay() function. I do not succeed in establishing an "if" condition. Has anyone an idea to solve my life?? Sincerly LB Faber
Back to top	IP Logged

lobarth New Member Offline Posts: 3	Re: Absdelay function implementation Reply #1 - Apr 3^rd, 2008, 7:05am A good night is often enough to understand better model language. ;D
Back to top	IP Logged

pancho_hideboo Senior Fellow Offline Posts: 1424 Real Homeless	Re: Absdelay function implementation Reply #2 - Apr 3^rd, 2008, 8:18am lobarth wrote on Apr 3^rd, 2008, 7:05am: A good night is often enough to understand better model language. �;D Have you found out work around by yourself ?
Back to top	Kita━━━━━━(ﾟ∀ﾟ)━━━━━━ !!!!! http://www7.plala.or.jp/ungeromeppa/flash/kita.html http://www.youtube.com/watch?v=mjIxGh55bMM&feature=related IP Logged

lobarth New Member Offline Posts: 3	Re: Absdelay function implementation Reply #3 - Jun 12^th, 2008, 6:59am Yes, in fact I did not understand correctly the function absdelay. I found after some time that the function "transition" fit my will in a better way.
Back to top	IP Logged

Pages: 1

Send Topic

Print

‹ Previous topic | Next topic ›

The Designer's Guide Community Forum » Powered by YaBB 2.2.2!
YaBB © 2000-2008. All Rights Reserved.