neoflash
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Mixed-Signal Designer
Posts: 397
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Hi, guys:
I've ever do design with TSMC 90nm and 0.18um CMOS process. Design on both of these processes are well correlated between simulation and modeling.
Now, I'm doing a new project on CSM .13G. Their documentation work sucks. I'm not sure how stable is their process and how good is their modeling accuracy?
Regards, Neo
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