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The Designer's Guide Community Forum › Design › Mixed-Signal Design › why use two switchs in the sampling period?

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why use two switchs in the sampling period? (Read 3601 times)

lxw1983 New Member Offline Posts: 3	why use two switchs in the sampling period? May 08^th, 2008, 7:43am this is a sigma-delta ADC,why use two swichs (/S1,/S1D)in sampling period?
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Stefan Senior Member Offline Posts: 124	Re: why use two switchs in the sampling period? Reply #1 - May 8^th, 2008, 7:52am strongly looks like DC offset cancellation ...
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lxw1983 New Member Offline Posts: 3	Re: why use two switchs in the sampling period? Reply #2 - May 8^th, 2008, 7:52am Hope someone can help me ,thanks !
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lxw1983 New Member Offline Posts: 3	Re: why use two switchs in the sampling period? Reply #3 - May 8^th, 2008, 7:58am DC offset cancellation?what mean ?I'm sorry I can't understand.
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ywguo Community Fellow Offline Posts: 943 Shanghai, PRC	Re: why use two switchs in the sampling period? Reply #4 - May 21^st, 2008, 12:12am Hi lxw1983, Would you please post a timing diagram of those switches? Yawei
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