I am now simulating Continuous-time Delta-Sigma Modulator at the behavioral level using Spectre in Cadence.

One modulator uses modules built with verilogA language, and the loop filter is realized with Laplace Transform Filter (laplace_nd).
Another modulator uses SVCVS instance in Cadence analoglib to realize the same loop filter.
Except loop filter realization, other parts of the modulator(quantizer, dac) are exactly the same. And the simulation settings are the same.

But I got quite different results when simulating both modulator. When doing FFT of both outputs, the first one achieves ideal SNR, while the second one has large distortion. Only if I increase the reltol from 1e-3 to 1e-9 for the second one, it can achieve ideal SNR.

(Even for a simple first-order integrator--1/s case, I also observe differences between verilogA module and SVCVS module under the same simulation option settings, which include max_time_step, reltol, vabstol, iabstol. For example, given an impulse as input, the integrator output is a step, but the final value of this step is different when using verilogA or SVCVS to realize 1/s)

For both modulator, they are realized at the same behavirol level, i.e. the loop filters are realized by plugging in transfer function's coefficients. Why the simulation results turn to be so different? Are they using different engines to solve differential equations?

Thank you very much!

Greetings,

  Spectre can stop at the time required for the FFT to eliminate
interpolation error, use skipstart and strobeperiod to control the
time stepping.

                                                           Best Regards,

                                                               Sheldon