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skas20

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headroom simulation
Jun 06^th, 2008, 2:27am

Can somebody please explain me fundamentally what is headroom simulation in analog circuits?
- I can understand its a simulations to make sure that all transistors are having enough vds to remain in sat.region even with a slight supply voltage changes..
- what I want to know is what are the methods to understand whether a transistor has enough headroom?
- do we have to run the simulation in all the corners etc...

Thanks.

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AnalogDE

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Re: headroom simulation
Reply #1 - Jun 10^th, 2008, 12:10am

You want to check to see that your Vds > Vdsat (for short channel transistors you want to look at the Vdsat given by SPICE, it's not equal to Vgs-Vt).

The worst case corner for headroom is

low VDD
slow corner (slow corner => transistors weaker => higher Vdsat req'd to keep in saturation)
highest temperature (high temp => lower mobility => higher Vdsat req'd)
and w/ transistors operating at their highest current levels (higher current => more Vdsat).

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weber8722

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Re: headroom simulation
Reply #2 - Mar 17^th, 2009, 7:25am

AnalogDE wrote on Jun 10^th, 2008, 12:10am:

You want to check to see that your Vds > Vdsat (for short channel transistors you want to look at the Vdsat given by SPICE, it's not equal to Vgs-Vt).

The worst case corner for headroom is

low VDD
slow corner (slow corner => transistors weaker => higher Vdsat req'd to keep in saturation)
highest temperature (high temp => lower mobility => higher Vdsat req'd)
and w/ transistors operating at their highest current levels (higher current => more Vdsat).

Let me add:

Slow corner for transistors!!
But fast corner for resistors!!

Wether high or low temperature corner is worst-case depends on current densitity. For low current usually the lowT corner is much more critical.

Bye Stephan

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