I have made a chip conform to ESD guidelines, but I am doing this blind since I dont understand why the rules are there. I have a digital Vcc and an analog Vcc, I also have VssD and VssA. I have power clamps from VccD to VssD and from VccA to VssA. On each input I also have two local clamps to its power rails..

So during ESD event when one IO is grounded (on VccD) and the spark is applied to another IO (on VccA), where does the energy go? Sorry if this basic question, but I want to understand why I need to do these rules.

Please read the following paper for grasping a few facts about ESD protection:

Ker, M.-D., "Whole-chip ESD protection design with efficient VDD-to-VSS ESD clamp circuit for submicron CMOS VLSI." IEEE Trans. on Electron Devices

Rajesh