Hello,
I just tested verilog-A model of nonlinear resistor that I have found in Cadence manual. Here i is.
Code:module RX_RES_MDL_book (a, b);
inout a, b;
electrical a, b;
real x[0:17], y[0:17], f_xy[0:17];
analog begin
@(initial_step) begin
x[0]= -10; y[0]=-10; f_xy[0]=0; // 0th sample point
x[1]= -10; y[1]=-8; f_xy[1]=-0.4; // 1st sample point
x[2]= -10; y[2]=-6; f_xy[2]=-0.8; // 2nd sample point
x[3]= -9; y[3]=-10; f_xy[3]=0.2;
x[4]= -9; y[4]=-8; f_xy[4]=-0.2;
x[5]= -9; y[5]=-6; f_xy[5]=-0.6;
x[6]= -9; y[6]=-4; f_xy[6]=-1;
x[7]= -8; y[7]=-10; f_xy[7]=0.4;
x[8]= -8; y[8]=-9; f_xy[8]=0.2;
x[9]= -8; y[9]=-7; f_xy[9]=-0.2;
x[10]= -8; y[10]=-5; f_xy[10]=-0.6;
x[11]= -8; y[11]=-3; f_xy[11]=-1;
x[12]= -7; y[12]=-10; f_xy[12]=0.6;
x[13]= -7; y[13]=-9; f_xy[13]=0.4;
x[14]= -7; y[14]=-8; f_xy[14]=0.2;
x[15]= -7; y[15]=-7; f_xy[15]=0;
x[16]= -7; y[16]=-6; f_xy[16]=-0.2;
x[17]= -7; y[17]=-5; f_xy[17]=-0.4;
end
I(a, b) <+ $table_model (V(a), V(b), x, y, f_xy, "");
end
endmodule
When I simulated following testbench (pls, see the picture), following error message appears in log window.
Code:Fatal error found by spectre at dc = 0 A during DC analysis `dc'.
"....../LIB11/RX_RES_MDL_book/veriloga/veriloga.va"
31: $table_model failed: zero dimension not allowed --
Analysis `dc' terminated prematurely due to error.
What signifies this message?
Thanks.
Regards.
Pavel.