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aaron_do

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passive mixer linearity
Aug 21^st, 2008, 9:12pm

Hi all,

generally for a passive mixer, we can improve the conversion gain and to a certain degree the noise performance by lowering the duty cycle. THis is generally done by reducing the DC gate bias of the switching FETs.

Supposedly this leads to poorer linearity as the high order LO harmonics will be more prevalent. However, IMO it seems that the harmonic generation of the input signal should be smaller since when the DC gate bias of the FET is reduced, the device is ON for a shorter time and hence covers a smaller operation region.

Any thoughts on this?

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nxing Community Member Offline God help the person who help themselves Posts: 46 China	Re: passive mixer linearity Reply #1 - Aug 26^th, 2008, 5:27pm Hi aaron_do, Can you tell some details why reduce the cycle can actually increase the gain? actually, I am thinking that if the duty cycle is reduce, the gain will be less than 2/pi. Regards, nxing
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aaron_do

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Re: passive mixer linearity
Reply #2 - Aug 27^th, 2008, 2:18am

Sure. You can find this in several papers on passive mixers btw.

The switch is a variable resistor. Its resistance can be expressed in a fourier series, so it has a DC component and an AC component.

Supposed a voltage is applied to the input at RF. This voltage will be converted into an IF signal by the first order component of the resistance. It will then reach the output and the load will be the zeroth order component. So overall you will get an equation which has the term G₁/G₀, where G₁ is the first order component of the conductance and G₀ is the zeroth order component. G₁/G₀ is dependent on the duty cycle, where a smaller duty cycle results in a high G₁/G₀. Note that G is zero when the transistor is off. Therefore a longer off time results in a smaller G₀.

The gain can reach a maximum value of 1 (0 dB). You will find a similar result in "A 12-mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver" by Arvin R. Shahani, Derek K. Shaeffer, and Thomas H. Lee.

If you actually try and write out the equations you will find it a little more difficult than what i've tried to explain.

cheers,
Aaron

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RFICDUDE

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Re: passive mixer linearity
Reply #3 - Aug 27^th, 2008, 6:58pm

You asked for thoughts ..

It seems as the duty cycle reduces the mixer is approaching an ideal impulse sampler as opposed to the natural sampling you get with 50% duty cycle. This explains the increased LO harmonic content as the switching aliases approach unity in respect to the input for ideal impulse sampling.

I suspect, but don't know for sure, that the degraded linearity originates from distortion during the rise/fall times of the switches. This becomes a greater percentage of the overall signal passed through the mixer, so the significance of the rise/fall and settling time impacts the desired signal more.
Just a guess/thought.

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aaron_do Senior Fellow Offline Posts: 1398	Re: passive mixer linearity Reply #4 - Aug 27^th, 2008, 7:39pm thanks. I hadn't even considered that at all... Aaron
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Poojan Wagh

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Re: passive mixer linearity
Reply #5 - Aug 28^th, 2008, 5:17pm

aaron_do wrote on Aug 27^th, 2008, 2:18am:

Sure. You can find this in several papers on passive mixers btw.

The switch is a variable resistor. Its resistance can be expressed in a fourier series, so it has a DC component and an AC component.

Supposed a voltage is applied to the input at RF. This voltage will be converted into an IF signal by the first order component of the resistance. It will then reach the output and the load will be the zeroth order component. So overall you will get an equation which has the term G₁/G₀, where G₁ is the first order component of the conductance and G₀ is the zeroth order component. G₁/G₀ is dependent on the duty cycle, where a smaller duty cycle results in a high G₁/G₀. Note that G is zero when the transistor is off. Therefore a longer off time results in a smaller G₀.

The gain can reach a maximum value of 1 (0 dB). You will find a similar result in "A 12-mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver" by Arvin R. Shahani, Derek K. Shaeffer, and Thomas H. Lee.

If you actually try and write out the equations you will find it a little more difficult than what i've tried to explain.

cheers,
Aaron

If you're doing a double-balanced switch-mode mixer, the usual analysis assumes you are multiplying with a +/- 1 square/rectangular signal. The first order harmonic of this pulse signal is given by:

2/pi * sin(pi * d)

where d is the duty ratio. The maximum conversion gain is given by d=50% (conversion gain of 2/pi, or -4 dB).

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aaron_do

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Re: passive mixer linearity
Reply #6 - Aug 28^th, 2008, 7:36pm

Hi,

thanks. Actually i am aware of that analysis too. Perhaps you could read the paper I mentioned (very good passive mixer analysis) in the previous post or maybe run some simulations with changing bias point. Personally, my own simulations agree that the maximum conversion gain is 1.

The paper I mentioned also concluded that a sine-wave drive gives a better conversion gain than a square-wave drive...

cheers,
Aaron

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kelly

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Re: passive mixer linearity
Reply #7 - Jan 20^th, 2011, 10:05pm

Hi Aaron,

I looked up the paper by TLee as you mentioned. I didn't see the analysis, Perhaps, I missed it?

A lot of the passive mixer paper analysis is for the I/Q mixers (by having non-overlapping clocks, you actually don't lose current or no two voltages are on at the same). But I assume the same principle apply even if you just have a single voltage mode passive mixer, right?

My problem is, I actually see this in the simulation (I have only one mixer in voltage mode), but I can't explain it.

Could you explain your G1/Go ananlysis again?

Thanks much.

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aaron_do

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Re: passive mixer linearity
Reply #8 - Jan 21^st, 2011, 5:06am

Hi Kelly,

I'm pretty sure there's an analysis there. Anyhow, if you're interested in my own analysis, then you could read the following paper:

A. V. Do et. Al, "An Energy-Aware CMOS Receiver Front End for Low-Power 2.4-GHz Applications", IEEE Transactions on Circuits and Systems I, vol. 57, no. 10, Oct 2010, pp. 2675-2684.

Read section IVB and the Appendix. You could also refer to a book (I can't exactly remember the title) by Stephen A. Mass about nonlinear microwave design.

cheers,
Aaron

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kelly Community Member Offline Posts: 67	Re: passive mixer linearity Reply #9 - Jan 23^rd, 2011, 2:18pm got it, thanks. I must have gotten the pre-journal (short paper) version of it the 1st time I searched (the text was only 1 page). I guess maybe another way to see why IIP3 degrades is that the mixer has a higher average impedance for the 25% LO duty cycle vs the 50% case. Thanks.
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kelly Community Member Offline Posts: 67	Re: passive mixer linearity Reply #10 - Feb 3^rd, 2011, 11:55pm Hi All, I have a stupid question, won't the 25% duty cycle causes a huge RF feedthtrough? Am I not thinking this right?
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RFICDUDE Community Fellow Offline Posts: 323	Re: passive mixer linearity Reply #11 - Feb 5^th, 2011, 11:15am Not if the architecture remains double balanced.
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kelly Community Member Offline Posts: 67	Re: passive mixer linearity Reply #12 - Feb 6^th, 2011, 1:53am oh, yeah, thanks. I forgot that the 25% duty cycle is non-overlapping, so the DC is still 0. Which is different from the normal duty cycle distortion case.
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kelly Community Member Offline Posts: 67	Re: passive mixer linearity Reply #13 - Feb 8^th, 2011, 2:18pm Hi, I am looking at the RF feedthrough as a function of the DCD on LO. It seems that it's very sensitive (-35dBc for a 49.5% or55.05% DCD). Does anyone see the same thing? By the way, this is just a single mixer not a IQ modulator. Thanks. Kelly
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RFICDUDE Community Fellow Offline Posts: 323	Re: passive mixer linearity Reply #14 - Feb 9^th, 2011, 5:25pm Is the single mixer operating from a 1/4 duty cycle LO? If so, is there a RF LC tank circuit on the RF side? What is the load on the baseband side?
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