jimwest
Junior Member
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Posts: 26
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Hi Folks, I was puzzled when measuring the jitter of a integer-N PLL. When the current of charge pump is increased, the jitter has been improved. I was told the main cause of the jitter in an SoC should be the spur introduced by the power supply. In order to reduce the power noise, the minimum bandwidth should be achieved. The lower bandwith, the lower spur level is. My question is why the larger bandwidth can improve the jitter performance?
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