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How much mismatch percentage of the Charge Pump? (Read 2766 times)
email_gz
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How much mismatch percentage of the Charge Pump?
Oct 05th, 2008, 11:57pm
 
Hello All:
     Does anyone know the value of how much mismatch percentage of the Charge Pump: |Iup-Idn|/Inormal in now days CMOS?
      The value is better from the published paper, so I can use this
paper as an index.
     Thank you very much!
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rf-design
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Re:  How much mismatch percentage of the Charge Pump?
Reply #1 - Oct 6th, 2008, 2:19pm
 
You should consider static and dynamic mismatch.

The static mismatch get better by higher output impedance of the switched current sources. If you use a regulated switched current sources where the bias currents are regulated to follow the changing output voltage of the source, then smaller faster switches could be used. If you scale the Vdsat of the PMOS and the NMOS you can faily balance the switch on/off times. These remain relative stable also unter active bias control. The I guess you can about 2-5% static match and some 10ps dynamic mismatch.
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Re:  How much mismatch percentage of the Charge Pump?
Reply #2 - Oct 9th, 2008, 11:47am
 
The answer to this is going to be unique to your transistors and foundry selection. Suggest that you do a mismatch study from the statistical data on the foundry models, and look at that in conjunction wity your dynamic switching mismatch characteristics, and your dependence on output voltage variance effects on currents. They will all play in to the answer.

email_gz wrote on Oct 5th, 2008, 11:57pm:
Hello All:
     Does anyone know the value of how much mismatch percentage of the Charge Pump: |Iup-Idn|/Inormal in now days CMOS?
      The value is better from the published paper, so I can use this
paper as an index.
     Thank you very much!

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Jerry Twomey
www.effectiveelectrons.com
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Contract IC-PCB-System Design - Analog, Mixed Signal, RF & Medical
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