Forum
Forum
Verilog-AMS
Analysis
Modeling
Design
Theory
Welcome, Guest. Please
Login
or
Register.
Please follow the Forum
guidelines
.
Jul 20
th
, 2024, 11:25pm
Home
Help
Search
Login
Register
PM to admin
The Designer's Guide Community Forum
›
Simulators
›
Circuit Simulators
› What licenses are used for batch-mode simulation?
‹
Previous topic
|
Next topic
›
Pages: 1
What licenses are used for batch-mode simulation? (Read 2587 times)
sugar
Community Member
Offline
Posts: 54
What licenses are used for batch-mode simulation?
Oct 13
th
, 2008, 1:57am
I created an ocean script to do batch-mode simulation.
I want to know what licenses will be used for this simulation? Virtuoso_Spectre or 34510?
Any other licenses?
Back to top
IP Logged
bernd
Senior Member
Offline
Posts: 229
Munich/Germany
Re: What licenses are used for batch-mode simulation?
Reply #1 -
Oct 13
th
, 2008, 2:08am
If possible you can check this out your self.
Two things to know, 1. your license server name, 2. if and where
the license server writes the log file.
- Login to your license server.
- Do a
tail -f /<myPath>/<license.log>
* bernd
Back to top
Just another lonesome cad guy
IP Logged
sugar
Community Member
Offline
Posts: 54
Re: What licenses are used for batch-mode simulation?
Reply #2 -
Oct 13
th
, 2008, 2:37am
Hi Bernd,
My license file is very simple, as below:
SERVER gaclic XXXXXXXX 5280
USE_SERVER
I cannot login to that server.
I don't know where is that license.log file either.
Back to top
IP Logged
bernd
Senior Member
Offline
Posts: 229
Munich/Germany
Re: What licenses are used for batch-mode simulation?
Reply #3 -
Oct 14
th
, 2008, 1:18am
Another possibility to check might be:
- Start your Ocean run.
- Then do a
lmstat -a -c <license_file> | grep -n5 <feature_name>
* bernd
Back to top
Just another lonesome cad guy
IP Logged
Pages: 1
‹
Previous topic
|
Next topic
›
Forum Jump »
» 10 most recent Posts
» 10 most recent Topics
Design
- RF Design
- Analog Design
- Mixed-Signal Design
- High-Speed I/O Design
- High-Power Design
- Mixed-Technology Design
Analog Verification
- Analog Functional Verification
- Analog Performance Verification
Measurements
- RF Measurements
- Phase Noise and Jitter Measurements
- Other Measurements
Modeling
- Semiconductor Devices
- Passive Devices
- Behavioral Models
- Transmission Lines and Other Distributed Devices
Design Languages
- Verilog-AMS
- VHDL-AMS
Simulators
»» Circuit Simulators
- RF Simulators
- AMS Simulators
- Timing Simulators
- System Simulators
- Logic Simulators
Other CAD Tools
- Entry Tools
- Physical Verification, Extraction and Analysis
- Unmet Needs in Analog CAD
General
- Tech Talk
- News
- Comments and Suggestions
- Opportunities
« Home
‹ Board
The Designer's Guide Community Forum
» Powered by
YaBB 2.2.2
!
YaBB
© 2000-2008. All Rights Reserved.
Copyright 2002-2024
Designer’s Guide Consulting, Inc.
Designer’s Guide
® is a registered trademark of
Designer’s Guide Consulting, Inc.
All rights reserved.
Send comments or questions to
editor@designers-guide.org
. Consider
submitting
a paper or model.