The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Jul 21st, 2024, 11:20am
Pages: 1
Send Topic Print
pnoise analysis (Read 3333 times)
vasu_lonka
New Member
*
Offline



Posts: 1

pnoise analysis
Oct 22nd, 2008, 7:17am
 
hi, i have done pnoise analysis  using spectre on a sample and hold circuit( nmos used as the  switch) .  I have used a sampling frequency of 625KHz and  signal frequency  of  62.5KHz. Hold  capacitor value is 14.5pF, which shuold give a total integrated noise  power  of 300p (kT/c). i used a maximum sideband value of  200.
The thing Iam confused with is that if  we  choose  stop frequency equal to  312.5KHz(fs/2), the total integrated noise is much less than kT/c . At the same time  if we choose stop frequency equal to 1GHz  the total integrated noise at the output equals the kT/c noise.
Even though we used the maximum sideband options, we still need to integrate till very high frequencies. Can anyone please tell me why it is like this ?
Back to top
 
 
View Profile   IP Logged
Frank Wiedmann
Community Fellow
*****
Offline



Posts: 678
Munich, Germany
Re: pnoise analysis
Reply #1 - Oct 22nd, 2008, 7:55am
 
If you look at figure 4 of http://www.designers-guide.org/Analysis/sc-filters.pdf, which is for a sampling frequency of 400 kHz, you can see that there is significant noise above this frequency. These results match the formulas derived in this paper.
Back to top
 
 
View Profile WWW   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.