gandhi_gaurav
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Thanks for the reply.
Let me explain the problem again.
Just trying to realize spice statements like the following into veriloga
.FUNC Q(v1,v2,v3,v4) { (Cg1*v3+Cg2*v4+C1*v1+C2*v2)/E } .FUNC VN(v) { CSUM*v/E } .FUNC GAMMA(u) { IF(T==0,IF(u<0,-u,0),IF(u==0,T,u/(EXP(u/T)-1)))}
.FUNC ALPHA(v1,v2,v3,v4) { ROUND(-Q(v1,v2,v3,v4)+(CSUM/E)*(v1*RN2+v2*RN1)) } In the above statements the function N_OPT calls Function Q, CSUM.
.FUNC R1L(n,v1,v2,v3,v4) {GAMMA(0.5 - n - Q(v1,v2,v3,v4) + VN(v1))/RN1} In the above statement the function R1L calls GAMMA.
Now my query is regarding > best modeling practice regarding function calling functions the > number of values that can be returned If declarations in functions are real and these cant take values which are defined electrical? For example:-
`include "constants.vams" `include "disciplines.vams"
module setmod2(v1, v2, v3, v4,v5); inout v1, v2, v3, v4,v5; electrical v1, v2 ,v3, v4,v5; parameter real C1=1 ; parameter real C2=1 ; parameter real R1=1 ; parameter real R2=1 ; parameter real Cg1=1 ; parameter real Cg2=0.1 ; parameter real C0=0 ; parameter real Q0=0 ; parameter real TEMP=4.2 ;
parameter real PI=3.14 ; parameter real E=1.5 ; parameter real KB=1.3 ; parameter real CSUM={C1+ C2+ Cg1+ Cg2+ C0} ; parameter real T={TEMP*CSUM*5.3785467E14} ; parameter real RN1={R1/(R1+ R2)} ; parameter real RN2={R2/(R1+ R2)} ;
analog function real Q1; input v_1, v_2, v_3, v_4; real v_1,v_2, v_3,v_4; Q1 = (Cg1*V(v_1)+Cg2*V(v_2)+C1*V(v_3)+C2*V(v_4))/(E+Q0) ; endfunction
analog begin V(v5) <= Q1(v1,v2,v3,v4); endmodule
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