sheldon
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Anand,
Your calculation seems to assume that the ADC has no intrinsic rejection. Hence the question, "How did you budget the supply rejection?" In addition, is it really reasonable to require the reference to reject the switching transients? This will require a very wide bandwidth reference. Wouldn't it be better to use on-chip bypassing to provide the high frequency rejection? One other comment, the ADC package inductance is going to make it difficult to meet this specification.
Best Regards,
Sheldon
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