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Intrinsic gain simulation (Read 1698 times)
roger123
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Intrinsic gain simulation
Dec 27th, 2008, 11:27am
 
Hello all,

I am trying to generate intrinsic gain vs gm-id plots for 0.18um nmos and pmos devices. However, I am noticing that intrinsic gain for pmos is greater than that for nmos. I guess it should be the other way around. I would be grateful if someone could point out the error in my simulations.

Setup for nmos device
VGS = 0 to 1.8V, VDS = 0.9V

Setup for pmos device
VSG = 0 to 1.8V, VSD = 0.9V
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