The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Jul 28th, 2024, 11:25am
Pages: 1
Send Topic Print
PSS and Pnoise simulation for auto-zeroed SC integrator in Sigma-delta (Read 8712 times)
happyday
New Member
*
Offline



Posts: 6

PSS and Pnoise simulation for auto-zeroed SC integrator in Sigma-delta
Jan 13th, 2009, 4:46am
 
Dear all,
    I have a question about using PSS and Pnosie to simulate an auto-zeroed SC integrator in sigma-delta modulator.
I want to know the 1/f noise corner of an auto-zeroed SC integrator
I have tried three different ways.

All simulations are done with zero input and 5V clock signal.

1) SC integrator (with Cs and Cint), normal connection:
Choosing noise type to "time domain", I can only plot output noise. Thus I need to divided it by the transfer function.

Thus I simulated the PAC simulation, however I can not get
the expected transfer function of the SC integrator. I use SC CMFB.
If I change it to CT CMFB. I can get the PAC transfer function I want.


2) SC integrator (with Cs and Cint), close loop by adding an S&H to feedback the output of the integrator to the input during the next integration phase.

This is described in Ken's paper about device noise simulation in Sigma-delta.
Since it's a unity gain feedback, the output noise will equal to the input noise.
PAC transfer function = 1 at low frequency  


3) SC integrator (with Cs and Cint), normal connection, and then followed by a S&H, not close loop. This technique is described in Ken's paper about SC-filter. I only sample the point at the end of the integratotion phase.

For these three techniques, I got different 1/f noise corner, I am not sure which one is the correct way to simulate
the input inferred noise for auto-zeroed SC integrator.

Is there anyone who knows about this problem?
Thank you very much in advance and I appreciate it.
Back to top
 
 
View Profile   IP Logged
happyday
New Member
*
Offline



Posts: 6

Re: PSS and Pnoise simulation for auto-zeroed SC integrator in Sigma-delta
Reply #1 - Jan 19th, 2009, 4:30am
 
Sorry that I did not explain the things clear.
Here I upload some pdf files that explain the problem.
the UGB of 1st opamp is 7 time the sampling frequency fs.
fs = 40kHz.
sampling capacitor cin = 3pF, integration capacitor cint = 12pF


the integrator is using CDS (correlated double sampling) to reduce
1/f noise.

SC_integrator.pdf   shows the topology of the integrator
noise_plot_not_close loop.pdf  shows the "time domain" pnoise result
of topology "SC_integrator.pdf"


SC_integrator_closeloop_SH.pdf    shows the close loop of the integrator by a sample & hold.

noise_plot_closeloopSH.pdf shows the "time domain" pnoise result
of topology "SC_integrator_closeloop_SH.pdf"

Back to top
 
View Profile   IP Logged
happyday
New Member
*
Offline



Posts: 6

Re: PSS and Pnoise simulation for auto-zeroed SC integrator in Sigma-delta
Reply #2 - Jan 19th, 2009, 4:31am
 
pnoise plot of SC_integrator
Back to top
 
View Profile   IP Logged
happyday
New Member
*
Offline



Posts: 6

Re: PSS and Pnoise simulation for auto-zeroed SC integrator in Sigma-delta
Reply #3 - Jan 19th, 2009, 4:32am
 
SC integrator close loop topology with sample & hold
Back to top
 
View Profile   IP Logged
happyday
New Member
*
Offline



Posts: 6

Re: PSS and Pnoise simulation for auto-zeroed SC integrator in Sigma-delta
Reply #4 - Jan 19th, 2009, 4:33am
 
pnoise plot of SC integrator (close loop) with Sample & hold
Back to top
 
View Profile   IP Logged
happyday
New Member
*
Offline



Posts: 6

Re: PSS and Pnoise simulation for auto-zeroed SC integrator in Sigma-delta
Reply #5 - Jan 19th, 2009, 4:39am
 
My questions are :

1/f noise corner is difficult in these two cases.

How can I get a transfer function of the SC integrator? I can not get an expected transfer function of SC integrator
(with opamp's DC gain at low frequency).

Hope I make it clear now.
Thank you in advance!
Back to top
 
 
View Profile   IP Logged
ShaXia
New Member
*
Offline



Posts: 2
Delft, the Netherlands
Re: PSS and Pnoise simulation for auto-zeroed SC integrator in Sigma-delta
Reply #6 - Feb 8th, 2011, 1:20am
 
Hi,

I am also simulating the auto-zeroed SC integrator, and I have come up with similar results.

To my greatest surprise is that the noise floor of open-loop simulation and closed-loop simulation are different. I also saw that in your simulation result: about 250 nV/sqrt(Hz) for the open loop simulation and about 600 nV/sqrt(Hz) for the closed loop simulation.

For me, the noise floor of the two simulations are also different: 80 nV/sqrt(Hz) for open-loop and 275 nV/sqrt(Hz) for closed-loop. I am using 10 pF Cs and sampling at 5 Mhz.

I wonder why this is the case.
Back to top
 
 
View Profile ShaXia   IP Logged
ShaXia
New Member
*
Offline



Posts: 2
Delft, the Netherlands
Re: PSS and Pnoise simulation for auto-zeroed SC integrator in Sigma-delta
Reply #7 - Feb 9th, 2011, 7:52am
 
Now I get it: in the closed loop simulation I have to use "source" pnoise simulation, so that the calculation is still in frequency domain.

The problem with doing time-domain pnoise simulation with close-loop is that the sampled noise comes back into the integrator input via the feedback path and gets amplified. That is why when I did close-loop time-domain simulation I get a much higher noise floor of the integrator.

Back to top
 
 
View Profile ShaXia   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.