Thanks for your replay Tosei,
Actually the current starving inverter is not an option for me because the SR must be controlled over a wide range of load capacitance.
one idea is to generate a "wave form" with the proper SR followed by a SR-free buffer. my problem is how to limit the output to Vref+/-
- If I use active clippers at the driver output I will burn a lot of current inside the chip.
- Controlling the amplitude of the SR shaping waveform feeding the Buffer in a feedback loop require a huge bandwidth (the driver is supposed to work at 20MHz).
I am designing a substitute chip, and the old one has such a smooth settling behavior that I am convinced that they didnīt use a feedback loop.
It must be something else !