The model Andrew suggested will provide the current into pin ini at the output pin outi for V(outi)=0 and increases output current with increasing output voltage (measured against ground!).
You need a model that fits your MOS implementation over the output voltage range of interest, so I suggest you simulate your real MOS current source and your model with a DC voltage source at the output and do a DC sweep over Voutmin to Voutmax.
I suggest you use a model of the type
Code:I(outi,vdd)<+I(ini,vdd)+V(outi,vdd)/R+C*ddt(V(outi,vdd));
and add an offset current to compensate for the fact that a real MOS current source will not provide I(Ini) at VDS=0V.
The simulation will also enable you to estimate if you need to model the non-linearity of your current source (compare NL of current with DAC NL requirements)...
BOE