I don't know of any "local" thick metal, except that which is deposited above the "final" passivation after the normal back-end-of-line metalisation. All other metals below the passivation are planarised.

From an integration point of view, the lower level metals are used for P&R and digital integration. These metals cannot be given different local thickness without significant processing cost.

Inductors in these technologies either or both of:
1) use a thicker top metal which is NOT part of the digital standard cell/P&R physical synthesis.
2) uses parallel lower level metals (as used in the digital part) to keep resistance low. Obviously the parasitic to substrate is increased due to proximity to substrate.

Anyway even in a planarised metal, local thickness variation is achieveable by selective fill etc. but this is not usually a parameter the designer plays with, since we can only affect the metal thicknesses by say 10~20%.

cheers
aw

Planarized metal can be done at different thicknesses, but it is not something which you can just ask for.

Frequently foundries will do a metal option that has 1 or 2 of the top metal layers thicker, with the very top not being planarized (some exceptions yes....) and the one below M-top, thicker but CMP planarized.

A couple of example options - IBM has a 5AM SiGe process with thick top metal for inductors, and the process is otherwise their 5HP.  TSMC does some "mixed signal and RF options" processes where they provide metal caps and thick metal interconnects.  

Ask at the foundry what you metal layer options are.