Sarig
Junior Member
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Posts: 31
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Hi Cosmin, I will try to answer you: I am at this moment ramping the RC extraction simulation (it was never been done before, (Don't ask me why I got this PA as is) the extraction is only RC but still I can't understnd how parasitics can kill 50dB. For the wire bond I use R,C,L package model What is loop inductance? Do you think that there is a chance that this PA which is differintail is effected by the power supply imedance seen by my block? and how can I masure it on silicon for my PA is a "black box" By the Way, have you ever seen such disaster in PA design? instead of 20dB gain is has -30dB loss. I can tell you one thing. for the last 8 years I have been an Analog designer and for the last year an RFIC designer and I have never been in a state were I am lost in debugging
Thanks, Erez
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