Hi,
Recently I am examine how parasitic capacitance impact phase noise of a LC-VCO. The MOSFET is based on BSIM4 model. I want to compare the phase noise performance of the VCO with and without parasitic capacitance due to the MOS devices.

Could you share with me some ideas about how to shut the parasitic capacitance in a BSIM4 MOSFET via simulator(SpectreRF) settings or via model modifications?

JC