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basic question on sigma delta ADC (Read 3201 times)
manodipan
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Posts: 83
basic question on sigma delta ADC
Mar 18
th
, 2009, 4:49am
Hi all,
I am just trying to understand switched capacitor type sigma delta ADC....let us say for example we have input sinusoid of common mode=0.6V and amplitude=0.3V with supply 1.2V....now the integrator's o/p range also is suppose 0.3 to 0.9V..now the o/p is either 1.2V or 0V based on the logic and fedback ..here is my question what value of reference(1.2V and 0V or 0.9V and 0.3V) should be chosen for DAC where my input FS=0.6V from 0.3V to 0.9V....
thanks for your help....
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subgold
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Re: basic question on sigma delta ADC
Reply #1 -
Mar 18
th
, 2009, 12:42pm
i think it depends on the modulator gain. in another word, the ratio of the capacitor value between the sample path and the feedback path from the dac.
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manodipan
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Re: basic question on sigma delta ADC
Reply #2 -
Mar 21
st
, 2009, 2:18am
Hi ,
thanks for ur reply......i think considering the extreme voltages that circuit can operate as reference we have to get the coefficients and select the cap sizes...
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cmos.analogvala
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Re: basic question on sigma delta ADC
Reply #3 -
Apr 23
rd
, 2009, 1:58am
I think DAC should be bipolar and VREFP should be 0.9 and VREFN should be 0.3. Am I correct ?
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manodipan
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Re: basic question on sigma delta ADC
Reply #4 -
Apr 23
rd
, 2009, 6:54am
Hi ,
I think you are right ,otherwise opamp o/p goes outside it's operating range.....now problem is that we need to generate two extra voltage references Vrefp and Vrefm....
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