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RFICDUDE

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Re: pattern gound shielding
Reply #15 - Apr 27^th, 2009, 8:02pm

I am a little confused by usefulness of a floating patterned ground shield.

What is the performance benefit of placing a floating patterned conductive shield under the inductor?

I would think that this provides no benefit because the RF currents in the shield have no place to go. This should look like a partially nonconductive dielectric (due to the pattern) layer.

Thanks

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pancho_hideboo

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Re: pattern ground shielding
Reply #16 - Apr 28^th, 2009, 1:45am

RFICDUDE wrote on Apr 27^th, 2009, 8:02pm:

What is the performance benefit of placing a floating patterned conductive shield under the inductor?

If we will reduce loss due to current flowing in substrate, metal patterns under inductor which have slits disturbing current low are useful.
But this metal patterns increase parasitic capacitor of inductor if they are connected to ground.
If this metal patterns are not connected to ground, parasitic capacitor doesn't increase compared to grounded metal patterns.

On the other hand, from point of view of substrate noise coupling shield, we have to use grounded metal patterns not floating metal patterns.

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RFICDUDE

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Re: pattern gound shielding
Reply #17 - Apr 28^th, 2009, 7:25am

Hmm, do you have a reference or a data point that supports the assertion that the floating shield reduces losses by preventing eddy current losses in the substrate?

The shield would have to somehow terminate the inductive field lines with less loss than currents induced in the substrate.

I am just curious how much benefit there is versus the modeling and layout effort to shield the inductor.

Thanks

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Peruzzi

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Re: pattern gound shielding
Reply #18 - Apr 28^th, 2009, 10:07am

All,

Please forgive my butting in on this topic so late on page two, but I sense some confusion with terminology. Maybe I'm the only one confused.

In deep sub-micron technologies there is a physical requirement for somewhat evenly spaced metal level coverage on the metal layers -- literally so the stacked layers won't be too bumpy. �So digital layout designers came up with the idea of the floating metal islands which don't bother digital electrical performance. �As far as I know, digital designers ignore the parasitics due to the metal fill.

RF and Analog designers can't ignore these parasitics. �More by instinct than anything I can prove, I'm not for allowing them to float and prefer to see these metal islands grounded. �Making use of their L or C properties seems creative too. �My point is, we're stuck with them, like it or not, and can only choose between trying to make them innocuous or putting them to use.

Or are you discussing something else altogether, where the floating or grounded patterned ground shield is optional?

Thanks,

Bob P.
www.RPeruzzi.com

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rfmems Senior Member Offline Posts: 121	Re: pattern gound shielding Reply #19 - Apr 28^th, 2009, 11:38am Hi Peruzzi, Actually for on-chip inductors, it is not necessary to have ground shield underneath. What you were saying is metal filling for designing rules of metal density. But violation is not strictly forbidden, one exception case is on-chip inductor.
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Peruzzi Community Member Offline Posts: 71	Re: pattern gound shielding Reply #20 - Apr 28^th, 2009, 11:42am Hi RFMems, Thank you for explaining the difference in a tolerant manner. �My curiosity often outweighs my fear of embarrassment �:) Best regards, Bob P.
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rfmems

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Re: pattern gound shielding
Reply #21 - Apr 28^th, 2009, 2:29pm

RFICDUDE wrote on Apr 28^th, 2009, 7:25am:

Hmm, do you have a reference or a data point that supports the assertion that the floating shield reduces losses by preventing eddy current losses in the substrate?

The shield would have to somehow terminate the inductive field lines with less loss than currents induced in the substrate.

I am just curious how much benefit there is versus the modeling and layout effort to shield the inductor.

Thanks

Hi RFICDUDE,

The PGS cuts the plate into strips so the eddy current can hardly flow. Floating PGS would reduce the electrically coupled capacitance to substrate (how effective depends on technologies). On the other hand, rf current can penetrate into substrate with PGS floating. So you see some trade-offs here. And whether it is useful depends on lots of factors.

For RF circuits, every dB counts. So if the PGS is helpful, surely it worths the work of modelling. PGS as I saw from this year's ISSCC, is still used for applications around 1-2GHz. But for higer frequencies (>=4G), it is almost never used. And it works better for LNA than VCO since PGS harms the tunability.

pancho_hidebo, since you have practical experiences on floating PGS, I hope you can add your comments to RFICGUIDE's questions, and correct me if I was wrong.

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