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analog_cha

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pattern gound shielding
Mar 24^th, 2009, 4:56am

I am a novice to this topic.
How do we do pattern ground shielding for an inductor??
I referred some paper which says that the patterns should be done tsuch that they are orthogonal to the spiral, so that it reduces the image currents and hence the ohmic losses.
But in case of an octogan, how can it be done??

If you have any good documents on this, pls share.
Thanks.

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loose-electron Senior Fellow Offline Best Design Tool = Capable Designers Posts: 1638 San Diego California	Re: pattern gound shielding Reply #1 - Apr 5^th, 2009, 4:48pm The isolation shielding of reactive passive elements sparks a lot of debate and opinion. Suggest that you look at putting it together in an EM modeling tool and experiment with the possibilities there. At least then the results are quantitative and not based upon opinions.
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rfmems Senior Member Offline Posts: 121	Re: pattern gound shielding Reply #2 - Apr 16^th, 2009, 6:36am Hi Loose-electron, Do you know if people are still using pattern ground shielding for on-chip inductors? I think it is used quite rarely. Could you please suggest some reference about the debates? Thanks a lot! cheers chenyan
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pancho_hideboo

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Re: pattern gound shielding
Reply #3 - Apr 16^th, 2009, 6:41am

rfmems wrote on Apr 16^th, 2009, 6:36am:

Do you know if people are still using ? I think it is used quite rarely.

If we see chip photos in ISSCC-2009, almost all use pattern ground shielding for on-chip inductors.

I also use pattern ground shielding for on-chip inductors using Cadence VPCD(Virtuoso Passive Component Designer).

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rfmems

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Re: pattern gound shielding
Reply #4 - Apr 16^th, 2009, 6:58am

pancho_hideboo wrote on Apr 16^th, 2009, 6:41am:

If we see chip photos in ISSCC-2009, almost all use pattern ground shielding for on-chip inductors.

I also use pattern ground shielding for on-chip inductors using Cadence VPCD(Virtuoso Passive Component Designer).

Hi pancho_hideboo, which ISSCC paper do you mean. I had a quick glance at the ISSCC2009 DVD pll session, did not find any patterned ground shield.

Anyway since you are still using them in design. Could you please share some experience, how much the quality factor can be improved (at which frequency)? Also if you can, some information of the technology you are using.

Thanks a lot
chenyan

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pancho_hideboo

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Re: pattern gound shielding
Reply #5 - Apr 16^th, 2009, 7:13am

rfmems wrote on Apr 16^th, 2009, 6:58am:

Hi pancho_hideboo, which ISSCC paper do you mean. I had a quick glance at the ISSCC2009 DVD pll session, did not find any patterned ground shield.

Wireless and RF building blocks.

rfmems wrote on Apr 16^th, 2009, 6:58am:

Anyway since you are still using them in design. Could you please share some experience, how much the quality factor can be improved (at which frequency)? Also if you can, some information of the technology you are using.

150nm and 130nm CMOS Process which have five metals and one thick metal.
These are not major foundry processes.

Quality factor is little improved as simulation.
Actual measurements also show little improvement in phase noise but it is not drastical improvement.

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rfmems

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Re: pattern gound shielding
Reply #6 - Apr 16^th, 2009, 8:12am

Hi pancho_hideboo,

Thanks. I think for blocks like lna, it is important to isolate the interferes from substrate, that is why PGS is more ofen used.

For VCO design, as the Q is not obviously improved, it is really used in rare cases. Of course isolate the interferers from substrate is also important for VCO. However, this can be handled with much easier solutions.

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pancho_hideboo

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Re: pattern gound shielding
Reply #7 - Apr 16^th, 2009, 8:23am

rfmems wrote on Apr 16^th, 2009, 8:12am:

I think for blocks like lna, it is important to isolate the interferes from substrate, that is why PGS is more ofen used.

For VCO design, as the Q is not obviously improved, it is really used in rare cases. Of course isolate the interferers from substrate is also important for VCO. However, this can be handled with much easier solutions.

My opinios are:
- PGS don't result in any bad effects at least.
- So it is not valueless to use PGS even for VCO design.
- Many major foundary PDK provide PGS for inductor.

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Terence Junior Member Offline CAD Lab. Posts: 23 Taiwan, R.O.C.	Re: pattern gound shielding Reply #8 - Apr 17^th, 2009, 3:53am There are two side-effects of PGS: 1.) One dedicate clean AC ground pad is required for each inductor 2.) Self-resonance freq is degraded. Actually, we do not use PGS very often.
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pancho_hideboo Senior Fellow Offline Posts: 1424 Real Homeless	Re: pattern ground shielding Reply #9 - Apr 17^th, 2009, 4:02am Terence wrote on Apr 17^th, 2009, 3:53am: 1.) One dedicate clean AC ground pad is required for each inductor What do you mean ? Terence wrote on Apr 17^th, 2009, 3:53am: 2.) Self-resonance freq is degraded. I agree to this effect.
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RFICDUDE

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Re: pattern gound shielding
Reply #10 - Apr 17^th, 2009, 11:37am

I believe they mean that if you really need the PGS to improve inductor to substrate isolation, then you need a dedicated, "clean," low impedance ground connection just for the shield. Otherwise the shield is not providing a good AC ground path for the substrate noise.

If the ground shield is tied to the local circuit ground, then it is probably not much more effective than using wide guard rings around the whole circuit to try and shunt off substrate noise.

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pancho_hideboo

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Re: pattern ground shielding
Reply #11 - Apr 18^th, 2009, 12:39am

RFICDUDE wrote on Apr 17^th, 2009, 11:37am:

I believe they mean that if you really need the PGS to improve inductor to substrate isolation, then you need a dedicated, "clean," low impedance ground connection just for the shield. Otherwise the shield is not providing a good AC ground path for the substrate noise.

I agree to your opinions if I use PGS as isolation of substrate noise.

But if I want to get high Quality factor of inductor, I think that Ground of PGS should be opened, that is, Patterned Floating Shield should be used.

How do you think ?

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« Last Edit: Apr 18^th, 2009, 2:05am by pancho_hideboo »

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rfmems

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Re: pattern gound shielding
Reply #12 - Apr 24^th, 2009, 6:35am

Hi pancho_hideboo,

Your floating PGS is a good point . In this case I guess the parasitic cap from inductor to floating shield in series with the cap between shield to substrate, am I right? With this method, I suppose you can reduce the Cp from ind to ground, but to which extent?

Also, I think whether to using PGS depends on the working frequency as well. Since small eddy current still exists and will reduce the inductance and Q at high frequency. Acoording to my simulation, 1-2GHz is fine, but higher you see the internal inductance start to fall below the same geomtry without PGS.

So maybe your inductor works in the range of 1-2GHz or its proximity. Let me know if I was wrong.

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« Last Edit: Apr 24^th, 2009, 8:51am by rfmems »

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pancho_hideboo

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Re: pattern ground shielding
Reply #13 - Apr 24^th, 2009, 8:39pm

chenyan, thanks for comments.

rfmems wrote on Apr 24^th, 2009, 6:35am:

Your floating PGS is a good point.
In this case I guess the parasitic cap from inductor to floating shield in series with the cap between shield to substrate, am I right?

Right.

rfmems wrote on Apr 24^th, 2009, 6:35am:

With this method, I suppose you can reduce the Cp from ind to ground, but to which extent?

If top two metals are enough far from substrate, there is almost no reduction of Cp even if I use floating PGS.
But they are not so far from substrate in my cheap process.

rfmems wrote on Apr 24^th, 2009, 6:35am:

Acoording to my simulation, 1-2GHz is fine,
but higher you see the internal inductance start to fall below the same geomtry without PGS.

What do you mean by "the internal inductance" ?
http://www.designers-guide.org/Forum/YaBB.pl?num=1205240723/1#1

rfmems wrote on Apr 24^th, 2009, 6:35am:

So maybe your inductor works in the range of 1-2GHz or its proximity. Let me know if I was wrong.

Operation frequency of my application is 2.4GHz.

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« Last Edit: Apr 25^th, 2009, 6:13am by pancho_hideboo »

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rfmems Senior Member Offline Posts: 121	Re: pattern gound shielding Reply #14 - Apr 25^th, 2009, 3:46am Hi pancho_hideboo, By internal indutance I mean the inductance excluded the factor of 1/(1-w^2LC), the self resonance factor. I guess it is the same concept in that thread you added.
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