Designer’s Guide Community

Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.

Sep 28^th, 2024, 2:21am

‹ Previous topic | Next topic ›

Pages: 1

delay circuit (Read 6512 times)

Ajay Junior Member Offline Posts: 14 Asia	delay circuit Apr 20^th, 2009, 6:40am Hi all, I need a circuit for introducing delay . Delay needed is a few microseconds . Can someone guide me ? thanks
Back to top	IP Logged

buddypoor Community Fellow Offline Posts: 529 Bremen, Germany	Re: delay circuit Reply #1 - Apr 20^th, 2009, 6:48am Ajay wrote on Apr 20^th, 2009, 6:40am: Hi all, I need a circuit for introducing delay . Delay needed is a few microseconds . Can someone guide me ? thanks For one frequency only ? Or for a certain band ? Did you consider already an allpass circuit ? It�s easy to realize. Have a look into a textbook on filter theory/circuits.
Back to top	LvW (buddypoor: In memory of the great late Buddy Rich) IP Logged

Ajay Junior Member Offline Posts: 14 Asia	Re: delay circuit Reply #2 - Apr 21^st, 2009, 2:18am Hello, Its a digital signal that I need to delay. When the input signal has a falling edge, the output of the delay circuit should go low after a few microseconds. Can someone clarify how to implement this ? Thanks.
Back to top	IP Logged

Berti Community Fellow Offline Posts: 356	Re: delay circuit Reply #3 - Apr 21^st, 2009, 3:13am Do you have a clock available? Then you could implement a counter. Cheers
Back to top	IP Logged

aamar Community Member Offline Posts: 57 Germany	Re: delay circuit Reply #4 - Apr 21^st, 2009, 7:53am Two cascaded inverters will delay the signal without inverting it. If one of the inverters is larger than the other (alpha ratio>1) you can then control the delay. Another possible way is to use a transmission gate as a resistance together with the input capacitance of the next gate will form an RC delay element Best regards, aamar
Back to top	IP Logged

HdrChopper Community Fellow Offline Posts: 493	Re: delay circuit Reply #5 - Apr 21^st, 2009, 9:46am hi, Apart from what aamar proposed, an additional option would be to have a couple of current-starved inverters. then the delay is controlled by such current and the input capacitance of the inverters. Regards Tosei
Back to top	Keep it simple IP Logged

AnalogDE Senior Member Offline Posts: 137	Re: delay circuit Reply #6 - Apr 21^st, 2009, 9:45pm If you can build a current source, use it to generate a small current to discharge a large capacitor. Precharge the cap to VDD and start discharging when the signal flips. The delay can be trimmed by varying the discharge current, capacitor size and the trip point of the inverter that follows it.
Back to top	IP Logged

Peruzzi

Community Member

Offline

Posts: 71

Re: delay circuit
Reply #7 - Apr 22^nd, 2009, 7:45am

Ajay,

All the responses are viable choices, but a couple of very important criteria were left out of the original question: How precise does the delay have to be, and does it need to be consistent over processing, power supply voltage and temperature? �Your answer to this determines which of the proposed solutions you choose.

Best regards,

Bob P.
www.RPeruzzi.com

IP Logged

Ajay Junior Member Offline Posts: 14 Asia	Re: delay circuit Reply #8 - Apr 25^th, 2009, 7:02am Hello Peruzzi, The delay circuit must give a delay of nearly 3us for all process corners and temperature variation from -40 to +125 degreeC. Supply voltage can vary from 1.8V to 3.6V. Which solution is the suitable one ?? Thanks and regards.
Back to top	IP Logged

Peruzzi Community Member Offline Posts: 71	Re: delay circuit Reply #9 - Apr 25^th, 2009, 10:00am Ajay, Berti's solution wins, because of your requirement for consistant delay over PVT. �Use digital delay -- a divided down clock and a counter. Any other opinions? Best regards, Bob P. www.RPeruzzi.com
Back to top	IP Logged

cmos.analogvala Community Member Offline Posts: 65 India	Re: delay circuit Reply #10 - Apr 25^th, 2009, 10:12am This Clock + counter is a useful only if clock frequency doesn't vary with PVT. If I am not wrong, clock frequency varies with PVT. CA
Back to top	IP Logged

Peruzzi Community Member Offline Posts: 71	Re: delay circuit Reply #11 - Apr 25^th, 2009, 10:23am CA, I suppose everything varies with PVT to some extent. Ajay hasn't posted all the constraints, but with a crystal oscillator and PLL, clock variance across PVT can be made negligible. Bob P. www.RPeruzzi.com
Back to top	IP Logged

Pages: 1

‹ Previous topic | Next topic ›