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manodipan Community Member Offline Posts: 83	area efficient high resistance implementation Apr 30^th, 2009, 4:57am Hi guys, I want an area efficient very high resistance(~ 4-5 MOhms) ,also the resiatnce is required to be controllable as i am using this to control the current source......off transistors can implement high resistance but process variation effect is very high...so can you suggest some literatures on that.....thank you..
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Andrew Beckett Senior Fellow Offline Life, don't talk to me about Life... Posts: 1742 Bracknell, UK	Re: area efficient high resistance implementation Reply #1 - May 1^st, 2009, 5:40am I think this and your previous post are in the wrong forum, since they're design questions. Perhaps Ken can move them... Regards, Andrew.
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HdrChopper Community Fellow Offline Posts: 493	Re: area efficient high resistance implementation Reply #2 - May 7^th, 2009, 7:17pm Have you thought of using a MOS with long L in triode mode. There are a lot of techniques for controlling the on resistance of such device (for example to make it linear over a large dynamic range). Regards Tosei
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vivkr

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Re: area efficient high resistance implementation
Reply #3 - May 10^th, 2009, 11:35pm

manodipan wrote on Apr 30^th, 2009, 4:57am:

Hi guys,
I want an area efficient very high resistance(~ 4-5 MOhms) ,also the resiatnce is required to be controllable as i am using this to control the current source......off transistors can implement high resistance but process variation effect is very high...so can you suggest some literatures on that.....thank you..

Hi,

No matter how you realize an on-chip resistance, the process variation will be quite high as long as there is no external precise reference available. You have to live with atleast +/- 20-30% variation in most cases. Else, you must consider trimming.

For realizing high resistance, you can use a narrow MOS transistor.

Regards,

Vivek

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ndnger Junior Member Offline Posts: 11 Los Angeles	Re: area efficient high resistance implementation Reply #4 - May 11^th, 2009, 2:03am Try to change your circuit architecture so that you can rely on the matching of identical MOS to cancel the variation, ie, circuit becomes ratio dependent.
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loose-electron Senior Fellow Offline Best Design Tool = Capable Designers Posts: 1638 San Diego California	Re: area efficient high resistance implementation Reply #5 - May 23^rd, 2009, 2:41pm if you are using the resistance to define a current source valuation (as sort of stated in your original post) you may want to consider geometry scaling or ratio driven design. How about some more details on what you are trying to do? (you may not need that resistor at all)
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